Re: [PATCH] sparc32: Move cache and TLB flushes over to method ops.
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> [PATCH] sparc32: Implement hard_smp_processor_id() via instruction patching. > > This is the last non-trivial user of btfixup. > > Like sparc64, use a special patch section to resolve the various > implementations of how to read the current CPU's ID when we don't > have current_thread_info()->cpu necessarily available. > > Signed-off-by: David S. Miller <davem@xxxxxxxxxxxxx> Boot tested UP and SMP builds on my ss5 - works! This variant is much easier to read/understand compared to the "blackbox" way! > > +#ifdef CONFIG_SMP > +ENTRY(hard_smp_processor_id) > +1: rd %tbr, %g1 > + srl %g1, 12, %o0 > + and %o0, 3, %o0 > + .section .cpuid_patch, "ax" > + /* Instruction location. */ > + .word 661b You wanted to say: .word 1b here... I obviously did not hit this as I test on sun4m, but leon/sun4d would be hit. Other than this everything looks good. Sam -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
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