Regarding data transfer per beat in AXI.

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Hi,

   Can somebody explain to me what a 'beat' is in data transfer in AXI 
protocol ?

 The documentations says:

Burst size
------------------
Table 4-2 shows how the ARSIZE or AWSIZE signal specifies the maximum number of 
data bytes to transfer in each beat, or data transfer, within a burst.

Table 4-2 Burst size encoding
ARSIZE[2:0] AWSIZE[2:0]   Bytes in transfer
b000                                          1
b001                                          2
b010                                          4
b011                                          8
b100                                         16
b101                                         32
b110                                         64
b111                                        128


The AXI determines from the transfer address which byte lanes of the data bus 
to use for each transfer.
For incrementing or wrapping bursts with transfer sizes narrower than the data 
bus, data transfers are on different byte lanes for each beat of the burst. The 
address of a fixed burst remains constant, and every transfer uses the same 
byte lanes.
The size of any transfer must not exceed the data bus width of the components 
in the transaction.

Thanks.

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