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Re: [MIPS] FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 | |
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Hello. Kevin D. Kissell wrote:
I'm cool with the patch as is, but in the general spirit of regarding
numeric constants other than 0 and 1 as instruments of Satan, it would
probably be even better if those reserved bits were defined
(FPU_CSR_RSVD, or whatever is compatible with existing convention for
such bits) along with the other FCSR bit masks in mipsregs.h, so that
the assigment looks like:
ctx->fcr31 = (value & ~(FPU_CSR_RSVD | 0x3)) |
ieee_rm[value & 0x3];
0x3 is still neither 0 nor 1, and so remains an instrument of Satan. How about #defining it also? :-)
WBR, Sergei
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