[PATCH] Alchemy: rework DBDMA init sequence.

[Manuel Lauss <mano@xxxxxxxxxxxxxxxxxxxxxxx>]

Signed-off-by: Manuel Lauss <mano@xxxxxxxxxxxxxxxxxxxxxxx>
---
 arch/mips/au1000/common/dbdma.c |   25 +++++++++----------------
 1 files changed, 9 insertions(+), 16 deletions(-)

diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 601ee91..c1f0a3c 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -57,8 +57,6 @@ static DEFINE_SPINLOCK(au1xxx_dbdma_spin_lock);
 #define ALIGN_ADDR(x, a)	((((u32)(x)) + (a-1)) & ~(a-1))
 
 static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
-static int dbdma_initialized;
-static void au1xxx_dbdma_init(void);
 
 static dbdev_tab_t dbdev_tab[] = {
 #ifdef CONFIG_SOC_AU1550
@@ -239,15 +237,6 @@ u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
 	chan_tab_t	*ctp;
 	au1x_dma_chan_t *cp;
 
-	/*
-	 * We do the intialization on the first channel allocation.
-	 * We have to wait because of the interrupt handler initialization
-	 * which can't be done successfully during board set up.
-	 */
-	if (!dbdma_initialized)
-		au1xxx_dbdma_init();
-	dbdma_initialized = 1;
-
 	stp = find_dbdev_id(srcid);
 	if (stp == NULL)
 		return 0;
@@ -863,9 +852,9 @@ static irqreturn_t dbdma_interrupt(int irq, void *dev_id)
 	return IRQ_RETVAL(1);
 }
 
-static void au1xxx_dbdma_init(void)
+static int __init au1xxx_dbdma_init(void)
 {
-	int irq_nr;
+	int irq_nr, ret;
 
 	dbdma_gptr->ddma_config = 0;
 	dbdma_gptr->ddma_throttle = 0;
@@ -880,10 +869,14 @@ static void au1xxx_dbdma_init(void)
 	#error Unknown Au1x00 SOC
 #endif
 
-	if (request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED,
-			"Au1xxx dbdma", (void *)dbdma_gptr))
-		printk(KERN_ERR "Can't get 1550 dbdma irq");
+	ret = request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED,
+			"Au1xxx dbdma", (void *)dbdma_gptr);
+	if (ret)
+		printk(KERN_ERR "Au1xxx dbdma: cannot get IRQ\n");
+
+	return ret;
 }
+subsys_initcall(au1xxx_dbdma_init);
 
 void au1xxx_dbdma_dump(u32 chanid)
 {
-- 
1.5.6.4