[PATCH v2] xHCI: Correct the #define XHCI_LEGACY_DISABLE_SMI

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Re-define XHCI_LEGACY_DISABLE_SMI and used it in right way. All SMI enable
bits will be cleared to zero and flag bits 29:31 are also cleared to zero.

Signed-off-by: Alex He <alex.he@xxxxxxx>
---
 drivers/usb/host/pci-quirks.c    |    3 ++-
 drivers/usb/host/xhci-ext-caps.h |    4 ++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index 7732d69..a1a1cb1 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -826,7 +826,8 @@ static void __devinit quirk_usb_handoff_xhci(struct pci_dev *pdev)
 	}
 
 	/* Disable any BIOS SMIs */
-	writel(XHCI_LEGACY_DISABLE_SMI,
+	val = readl(base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
+	writel(val & XHCI_LEGACY_DISABLE_SMI,
 			base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
 
 	if (usb_is_intel_switchable_xhci(pdev))
diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h
index c7f3312..582e17f 100644
--- a/drivers/usb/host/xhci-ext-caps.h
+++ b/drivers/usb/host/xhci-ext-caps.h
@@ -62,8 +62,8 @@
 /* USB Legacy Support Control and Status Register  - section 7.1.2 */
 /* Add this offset, plus the value of xECP in HCCPARAMS to the base address */
 #define XHCI_LEGACY_CONTROL_OFFSET	(0x04)
-/* bits 1:2, 5:12, and 17:19 need to be preserved; bits 21:28 should be zero */
-#define	XHCI_LEGACY_DISABLE_SMI		((0x3 << 1) + (0xff << 5) + (0x7 << 17))
+/* bits 0, 4, 13:15 should be zero; bits 29:31 are RW1C */
+#define	XHCI_LEGACY_DISABLE_SMI		(~((0x1<<0) + (0x1<<4) + (0x7<<13)))
 
 /* USB 2.0 xHCI 0.96 L1C capability - section 7.2.2.1.3.2 */
 #define XHCI_L1C               (1 << 16)
-- 
1.7.1


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B and H Foto and Electronics Corp.

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