[patch 2.6.27-rc5] omap_udc: sync with OMAP tree

[David Brownell <david-b@xxxxxxxxxxx>]

From: Tony Lindgren <tony@xxxxxxxxxxx>

Sync up USB parts of the omap_udc support in mainline with the OMAP tree.
This patch addresses some OMAP2 differences ... there's another, with
respect to the double-buffering issue with PIO-IN in omap_ep_setup()
(which is now out of sync with the comments), but it's not clear right
now how to address that.

Signed-off-by: David Brownell <dbrownell@xxxxxxxxxxxxxxxxxxxxx>
---
 drivers/usb/gadget/Kconfig    |    2 +-
 drivers/usb/gadget/omap_udc.c |    7 +++++++
 2 files changed, 8 insertions(+), 1 deletion(-)

--- a/drivers/usb/gadget/Kconfig	2008-09-01 11:13:34.000000000 -0700
+++ b/drivers/usb/gadget/Kconfig	2008-09-03 11:19:58.000000000 -0700
@@ -297,7 +297,7 @@
 config USB_GADGET_OMAP
 	boolean "OMAP USB Device Controller"
 	depends on ARCH_OMAP
-	select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3
+	select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_H4_OTG
 	help
 	   Many Texas Instruments OMAP processors have flexible full
 	   speed USB device controllers, with support for up to 30
--- a/drivers/usb/gadget/omap_udc.c	2008-09-01 11:13:35.000000000 -0700
+++ b/drivers/usb/gadget/omap_udc.c	2008-09-03 11:32:56.000000000 -0700
@@ -2313,6 +2313,13 @@
 
 	tmp = omap_readl(OTG_REV);
 	if (cpu_is_omap24xx()) {
+		/*
+		 * REVISIT: Not clear how this works on OMAP2.  trans
+		 * is ANDed to produce bits 7 and 8, which might make
+		 * sense for USB_TRANSCEIVER_CTRL on OMAP1,
+		 * but with CONTROL_DEVCONF, these bits have something to
+		 * do with the frame adjustment counter and McBSP2.
+		 */
 		ctrl_name = "control_devconf";
 		trans = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 	} else {
--
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