Re: [PATCH] sh: support SIU sourcing from external clock on sh7722

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On Fri, Jan 15, 2010 at 4:49 PM, Guennadi Liakhovetski
<g.liakhovetski@xxxxxx> wrote:
> This is a preparation patch for upcoming SIU audio interface support
> patches. It implements switching between the PLL and the master clock,
> supplied from a codec over SIUMCK[AB] pins, as a clock source for SIU[AB]
> and setting of the divisor.
>
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@xxxxxx>
> ---

Thanks for the patch!

> In fact, the .set_rate() method can be easily extended to become suitable
> for all "div4" clocks, would this be preferred?

I think both .set_rate() and .set_parent() can be reused for all
"div4" clocks. Check if parent name is "pll_clk", if so clear bit 7
otherwise set bit 7. This way the external pin code will work for SIU
on both sh7722 and sh7723.

/ magnus
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