Re: [PATCH 1/8] ARM: OMAP: fix DMA vs memory ordering |
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On Wed, Apr 18, 2012 at 01:15:20PM +0300, Felipe Balbi wrote:
> On Wed, Apr 18, 2012 at 11:10:35AM +0100, Russell King wrote:
> > Using coherent DMA memory with the OMAP DMA engine results in
> > unpredictable behaviour due to memory ordering issues; as things stand,
> > there is no guarantee that data written to coherent DMA memory will be
> > visible to the DMA hardware.
> >
> > This is because the OMAP dma_write() accessor contains no barriers,
> > necessary on ARMv6 and above. The effect of this can be seen in comments
> > in the OMAP serial driver, which incorrectly talks about cache flushing
> > for the coherent DMA stuff.
> >
> > Rather than adding barriers to the accessors, add it in the DMA support
> > code just before we enable DMA, and just after we disable DMA. This
> > avoids having barriers for every DMA register access.
> >
> > Signed-off-by: Russell King <rmk+kernel@xxxxxxxxxxxxxxxx>
>
> cool, should this go to stable too ?
Has anyone seen a problem (other than me when trying to get DMA engine
working with omap-serial transmit paths) ?
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