Both the powerdown mode bits and the sample value are stored in the same
register, so writing a sample while the device is powered down will clear the
power down bits. To avoid this only update the cached value when the device is
powered down.
Signed-off-by: Lars-Peter Clausen <lars@xxxxxxxxxx>
---
drivers/staging/iio/dac/ad5446.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/iio/dac/ad5446.c b/drivers/staging/iio/dac/ad5446.c
index ec6968b..0cfe445 100644
--- a/drivers/staging/iio/dac/ad5446.c
+++ b/drivers/staging/iio/dac/ad5446.c
@@ -282,7 +282,8 @@ static int ad5446_write_raw(struct iio_dev *indio_dev,
val <<= chan->scan_type.shift;
mutex_lock(&indio_dev->mlock);
st->cached_val = val;
- st->chip_info->store_sample(st, val);
+ if (!st->pwr_down)
+ st->chip_info->store_sample(st, val);
ret = spi_sync(st->spi, &st->msg);
mutex_unlock(&indio_dev->mlock);
break;
--
1.7.9.5
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