RE: [PATCH 4/8] i2c: i2c-bfin-twi: Tighten condition when failing I2C transfer if MEN bit is reset unexpectedly.

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>-----Original Message-----
>From: Shubhrajyoti Datta [mailto:omaplinuxkernel@xxxxxxxxx]
>Sent: Thursday, May 17, 2012 7:31 PM
>To: Zhang, Sonic
>Cc: Ben Dooks; Wolfram Sang; linux-i2c@xxxxxxxxxxxxxxx; LKML; uclinux-dist-
>devel@xxxxxxxxxxxxxxxxxxxx
>Subject: Re: [PATCH 4/8] i2c: i2c-bfin-twi: Tighten condition when failing I2C
>transfer if MEN bit is reset unexpectedly.
>
>On Wed, May 16, 2012 at 12:50 PM,  <sonic.zhang@xxxxxxxxxx> wrote:
>> From: Sonic Zhang <sonic.zhang@xxxxxxxxxx>
>>
>> Correct I2C transfer may fail because interrupt status bits XMTSERV and
>> RCVSERV are not checked when MCOMP interrupt is handled.
>>
>Could you expand MCOMP?

Master transfer complete (MCOMP)
[1] The initiated master transfer has completed. In the absence of a
repeat start, the bus has been released.
[0] The completion of a transfer has not been detected.


Regards,

Sonic

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