- Subject: Re: [PATCH 14/14] crc32: Select an algorithm via kconfig
- From: "Darrick J. Wong" <djwong@xxxxxxxxxx>
- Date: Tue, 13 Dec 2011 10:36:44 -0800
- Cc: "'Andreas Dilger'" <adilger.kernel@xxxxxxxxx>, "'Andrew Morton'" <akpm@xxxxxxxxxxxxxxxxxxxx>, "'Mingming Cao'" <cmm@xxxxxxxxxx>, "'Herbert Xu'" <herbert@xxxxxxxxxxxxxxxxxxxx>, "'linux-crypto'" <linux-crypto@xxxxxxxxxxxxxxx>, linux-ext4@xxxxxxxxxxxxxxx, "'linux-fsdevel'" <linux-fsdevel@xxxxxxxxxxxxxxx>, "'linux-kernel'" <linux-kernel@xxxxxxxxxxxxxxx>, Bob Pearson <rpearson@xxxxxxxxxxxxxxxxxxxxx>, "'Theodore Tso'" <tytso@xxxxxxx>
- In-reply-to: <OF62576D22.A1ACD2B5-ONC1257965.002E3817-C1257965.002E6F16@transmode.se>
- Reply-to: djwong@xxxxxxxxxx
- User-agent: Mutt/1.5.17+20080114 (2008-01-14)
On Tue, Dec 13, 2011 at 09:27:10AM +0100, Joakim Tjernlund wrote:
> "Darrick J. Wong" <djwong@xxxxxxxxxx> wrote on 2011/12/13 07:32:28:
> >
> > On Mon, Dec 12, 2011 at 05:10:45PM -0600, Bob Pearson wrote:
> > > That choice was for Joakim who measured better performance on his 32 bit PPC
> > > platform with "by 4".
> >
> > Ok. On my 1.33GHz PowerBook I get ~255MB/s with slice by 4 and ~270MB/s with
> > slice by 8. I think it's a PPC 7447, and definitely 32-bit. In any case, it
> > reports having 32K of L1D cache.
>
> I tested Bobs early version on my mpc8321(266MHz, embedded CPU) and it was just
> half the speed compared with current crc32.
I wonder, given the patch "crc32: Speed up memory table access on powerpc"
would you mind retesting to see if slice by 8 still trails slice by 4 on your
powerpc? I see that your mpc8321 has 16K of L1D cache and a 32-bit memory bus
whereas my 7447 has a 64-bit memory bus. I wonder if memory bus size could be
a defining characteristic...?
I tried it out the crc32c code on a s390x today; apparently by-8 trails by-4
there too. It's unfortunately difficult to figure out the hardware details of
whatever's going on underneath that VM.
--D
>
> Jocke
>
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