latency and throughput

[Nicolas Bock <nicolasbock@xxxxxxxxx>]

Hello list,

how would one go about analyzing an assembly code in terms of data
dependencies and instruction latency and throughput? What I am looking
for is a way to help me analyze the potential performance of an
instruction sequence and a way to tell me where I could possibly
improve the sequence due to data dependencies, i.e. instruction
latency issues, or instruction throughput issues. Although I can
lookup the latency/throughput values in the Intel Optimization manual,
I still have a hard time figuring out how to estimate the issue rate
of the processor and therefore how the instruction overlap in the
execution core.

Thanks in advance,

nick
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