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SDCC porting feasibility study, part 1: the assembler



I've started looking at SDCC to try and get an idea how easy it is to
port this to target 8086.

Assuming one starts with the 8051 assembler it already has, I think
these are the main areas needed to make the assembler work:

i8086.h:
-Define numeric IDs for each class of opcode
-Define numeric IDs for each addressing mode
-Define numeric IDs for each register
-Prototypes for i80adr.c and i86mch.c

i86adr.c:
-Assign string names to registers
-Write code to classify arguments to address modes

i86ext.c:
-Define processor name, endianness, and asm file extension

i86mch.c
-Write code to emit machine instructions

i86pst.c:
-Fill in table describing keywords and mnemonics
-Fill in table assigning numbers to registers and register bits

in global assembler code:
-Investigate what, if any, global changes are needed to support 8086.

8051 is very close to 8086 in terms of flags.  Registers are different
and 8086 is perhaps less orthogonal when it comes to some operations,
and addressing modes.  Segmentation doesn't exist natively on 8051 but
there is already some code present to support a weird 8051 with 24 bit
address space.

Another thought, is that it isn't strictly necessary to support every
8086 opcode and addressing mode in the beginning, just what the
compiler emits.
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