[PATCH] KVM: PPC: Fix PR KVM on POWER7 bare metal

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When running on a system that is HV capable, some interrupts use HSRR
SPRs instead of the normal SRR SPRs. These are also used in the Linux
handlers to jump back to code after an interrupt got processed.

Unfortunately, in our "jump back to the real host handler after we've
done the context switch" code, we were only setting the SRR SPRs,
rendering Linux to jump back to some invalid IP after it's processed
the interrupt.

This fixes random crashes on p7 opal mode with PR KVM for me.

Signed-off-by: Alexander Graf <agraf@xxxxxxx>
 arch/powerpc/kvm/book3s_segment.S |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S
index 0676ae2..64f9018 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b/arch/powerpc/kvm/book3s_segment.S
@@ -347,6 +347,13 @@ no_dcbz32_off:
 	/* Load highmem handler address */
 	mtsrr0	r8
+#ifdef CONFIG_PPC64
+	mtspr	SPRN_HSRR1, r6
+	mtspr	SPRN_HSRR0, r8
 	/* RFI into the highmem handler, or jump to interrupt handler */

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