On 04/03/2012 08:24 PM, Jan Kiszka wrote:
> >
> >>>
> >>> A performance note: delivering an interrupt needs to search all vcpus
> >>> for an APIC ID match. The previous plan was to cache (or pre-calculate)
> >>> this lookup in the irq routing table. Now it looks like we'll need a
> >>> separate cache for this.
> >>
> >> As this is non-existent until today, we don't regress here. And it can
> >> still be added on top later on, transparently.
> >
> > Yes, it's just a note, not an objection. The cache lookup will be
> > slower than the gsi lookup (hash table vs. array) but still O(1) vs. the
> > current O(n).
>
> If you are concerned about performance in this path, wouldn't a DMA
> interface for MSI injection be counterproductive?
Yes, it would. The lack of coalescing reporting support is also
problematic. I just mentioned this idea as food for thought.
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