Il 20/03/2012 18:39, Stefano Stabellini ha scritto:
> This code is new: does it mean we were not handling divider reset
> correctly before?
> Also if we are trying to handle the DV registers, shouldn't we emulated
> the other RTC frequencies as well? If so, we need a scale factor, in
> addition to an offset to QEMU rtc_clock.
The other frequencies are never used in practice. But divider reset's
500ms delay can be used in tests.
Paolo
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