Re: [PATCH] perf/x86: check ucode before disabling PEBS on SandyBridge

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On Fri, Jun 08, 2012 at 04:45:18PM +0200, Peter Zijlstra wrote:
> I was thinking about reload_store(), that seems to only reload ucode for
> a single cpu.


> > > The 'bestestet' idea I came up with is doing the verify thing I have
> > > from a delayed work -- say 1 second into the future. That way, when
> > > there's lots of cpus they all try and enqueue the one work, which at
> > > the end executes only once, provided the entire update scan took less
> > > than the second.
> > 
> > You're saying, you want the last CPU that gets to update its microcode
> > gets to also run the delayed work...? Probably, I'd assume ucode update
> > on a single CPU takes less than a second IIUC.
> Nah.. it'll probably be the first. But it doesn't matter which cpu does
> it. So the idea was:
> static void intel_snb_verify_work(struct work_struct *work)
> {
> 	/* do the verify thing.. */
> }
> static DECLARE_DELAYED_WORK(intel_snb_delayed_work, intel_snb_verify_ucode);
> static int intel_snb_ucode_notifier(struct notifier_block *self,
>                                    unsigned long action, void *_uci)
> {
>         /*
>          * Since ucode cannot be down-graded, and no future ucode revision
>          * is known to break PEBS again, we're ok with MICROCODE_CAN_UPDATE.
>          */
>         if (action == MICROCODE_UPDATED)
> 		schedule_delayed_work(&intel_snb_delayed_work, HZ);
>         return NOTIFY_DONE;
> }
> Thus it will queue the delayed work when the work isn't already queued
> for execution. Resulting in the work only happening once a second (at
> most).

Ok, this would probably work - the last cpu that schedules the work should
definitely see ucode version updated on all cpus.

Or, instead of doing the verify thing on each cpu, you could track which
is the last cpu to run the delayed work and do the verify thing only on
it (the other works simply remove a bit from a bitmask or whatever...).


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