Re: shift instruction

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naga raj <gnuuser.raj@xxxxxxxxx> writes:

>    I am working on a soft-processor which has barrel-shifter as
> optional i.e if barrel-shifter hardware is included then my compiler
> can generate shift instructions with immediate operand if
> barrel-shifter is not included than it can shift only one bit.
>
>  Ex:  If I want to shift a register right for 24 times
>
>     case 1: If barrel-shifter is present then it generates as below
>         SHL r0,r0,#24
>
>       case 2: Without barrel-shifter
>
>          SHL r0,r0,#1
>          SHL r0,r0,#1
>          SHL r0,r0,#1
>             -----
>             -----
>          SHL r0,r0,#1
>
>         Compiler will generate SHL instruction for 24 times.
>
>
>     Is there any chance to optimize generated code when barrel-shifter
> is not used because as the immediate operand number increases it is
> genereating that huge code.

Use a predicate for your define_expand saying that ashiftMODE3 is not
available when the barrel-shifter is not available.  That should cause
gcc to generate a call to the libgcc function.

Ian


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