Hi list,
I make simple patch for using MRAM on Kinetis.
I configure all clocks in my GDB script from FlexBus example (from Freescale)
It works for me (I don't use Redboot), but maybe there are something else to do.
Best regards.
diff -Naur ecos-005373cca888-old/packages/hal/cortexm//arch/current/src/hal_misc.c ecos-005373cca888/packages/hal/cortexm//arch/current/src/hal_misc.c
--- ecos-005373cca888-old/packages/hal/cortexm//arch/current/src/hal_misc.c 2011-10-30 21:39:51.000000000 +0100
+++ ecos-005373cca888/packages/hal/cortexm//arch/current/src/hal_misc.c 2011-11-09 14:51:08.000000000 +0100
@@ -190,7 +190,7 @@
#endif // !defined(CYG_HAL_STARTUP_RAM)
-#if defined(CYG_HAL_STARTUP_ROM)
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_MRAM)
// Relocate data from ROM to RAM
{
register cyg_uint32 *p, *q;
@@ -556,10 +556,19 @@
}
}
#else
+#if !defined(CYG_HAL_STARTUP_MRAM)
pfunc *p;
for (p = &CONSTRUCTORS_START; p != CONSTRUCTORS_END; NEXT_CONSTRUCTOR(p))
(*p)();
+#else
+ //skip <_GLOBAL__I.10100_diag_write_char+1>, nothing in flash
+ pfunc *p=&CONSTRUCTORS_START;
+ p = NEXT_CONSTRUCTOR(p);
+
+ for (; p != CONSTRUCTORS_END; NEXT_CONSTRUCTOR(p))
+ (*p)();
+#endif
#endif
}
diff -Naur ecos-005373cca888-old/packages/hal/cortexm//kinetis/twr_k60n512/current/src/twr_k60n512_misc.c ecos-005373cca888/packages/hal/cortexm//kinetis/twr_k60n512/current/src/twr_k60n512_misc.c
--- ecos-005373cca888-old/packages/hal/cortexm//kinetis/twr_k60n512/current/src/twr_k60n512_misc.c 2011-10-30 21:39:51.000000000 +0100
+++ ecos-005373cca888/packages/hal/cortexm//kinetis/twr_k60n512/current/src/twr_k60n512_misc.c 2011-11-09 14:18:55.000000000 +0100
@@ -88,8 +88,10 @@
__externC void CYGOPT_HAL_KINETIS_MISC_FLASH_SECTION_ATTR
hal_system_init( void )
{
-#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_SRAM)
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_SRAM) || defined(CYG_HAL_STARTUP_MRAM)
+#if !defined(CYG_HAL_STARTUP_MRAM)
hal_wdog_disable();
+#endif
hal_gpio_init();
#endif
#if defined(CYG_HAL_STARTUP_SRAM) && !defined(CYGHWR_HAL_CORTEXM_KINETIS_SRAM_UNIFIED)
diff -Naur ecos-005373cca888-old/packages/hal/cortexm//kinetis/var/current/cdl/hal_cortexm_kinetis.cdl ecos-005373cca888/packages/hal/cortexm//kinetis/var/current/cdl/hal_cortexm_kinetis.cdl
--- ecos-005373cca888-old/packages/hal/cortexm//kinetis/var/current/cdl/hal_cortexm_kinetis.cdl 2011-10-30 21:39:51.000000000 +0100
+++ ecos-005373cca888/packages/hal/cortexm//kinetis/var/current/cdl/hal_cortexm_kinetis.cdl 2011-11-09 14:10:43.000000000 +0100
@@ -205,7 +205,7 @@
default_value {
(CYG_HAL_STARTUP_PLF) && (CYG_HAL_STARTUP_PLF!="ByVariant") ?
"ByPlatform" : "ROM" }
- legal_values { "ROM" "SRAM" }
+ legal_values { "ROM" "SRAM" "MRAM" }
active_if ((!CYG_HAL_STARTUP_PLF) || (CYG_HAL_STARTUP_PLF=="ByVariant"))
description "
'ROM' startup builds a stand-alone application which will
@@ -320,6 +320,8 @@
. CYGHWR_HAL_CORTEXM_KINETIS_OC_MEM_LAYOUT . "_rom" :
(CYG_HAL_STARTUP == "SRAM") ? "kinetis_"
. CYGHWR_HAL_CORTEXM_KINETIS_OC_MEM_LAYOUT . "_sram" :
+ (CYG_HAL_STARTUP == "MRAM") ? "kinetis_"
+ . CYGHWR_HAL_CORTEXM_KINETIS_OC_MEM_LAYOUT . "_mram" :
"undefined" }
description "
Combination of 'Startup type' and 'Kinetis part'
diff -Naur ecos-005373cca888-old/packages/hal/cortexm//kinetis/var/current/include/pkgconf/mlt_kinetis_flash_unisram_mram.h ecos-005373cca888/packages/hal/cortexm//kinetis/var/current/include/pkgconf/mlt_kinetis_flash_unisram_mram.h
--- ecos-005373cca888-old/packages/hal/cortexm//kinetis/var/current/include/pkgconf/mlt_kinetis_flash_unisram_mram.h 1970-01-01 01:00:00.000000000 +0100
+++ ecos-005373cca888/packages/hal/cortexm//kinetis/var/current/include/pkgconf/mlt_kinetis_flash_unisram_mram.h 2011-11-09 14:07:40.000000000 +0100
@@ -0,0 +1,20 @@
+// eCos memory layout
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE)
+#define CYGMEM_REGION_ram_SIZE (CYGHWR_HAL_KINETIS_SRAM_SIZE-CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#define CYGMEM_REGION_mram (0x60000000)
+#define CYGMEM_REGION_mram_SIZE (0x80000)
+#define CYGMEM_REGION_mram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (CYGMEM_REGION_ram+CYGMEM_REGION_ram_SIZE - (size_t) CYG_LABEL_NAME (__heap1))
diff -Naur ecos-005373cca888-old/packages/hal/cortexm//kinetis/var/current/include/pkgconf/mlt_kinetis_flash_unisram_mram.ldi ecos-005373cca888/packages/hal/cortexm//kinetis/var/current/include/pkgconf/mlt_kinetis_flash_unisram_mram.ldi
--- ecos-005373cca888-old/packages/hal/cortexm//kinetis/var/current/include/pkgconf/mlt_kinetis_flash_unisram_mram.ldi 1970-01-01 01:00:00.000000000 +0100
+++ ecos-005373cca888/packages/hal/cortexm//kinetis/var/current/include/pkgconf/mlt_kinetis_flash_unisram_mram.ldi 2011-11-09 14:07:34.000000000 +0100
@@ -0,0 +1,34 @@
+// eCos memory layout
+
+#include <pkgconf/hal.h>
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ ram : ORIGIN = 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE, LENGTH = CYGHWR_HAL_KINETIS_SRAM_SIZE-CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
+ mram : ORIGIN = 0x60000000, LENGTH = 512K
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+ SECTION_rom_vectors (mram, 0x60000000, LMA_EQ_VMA)
+ SECTION_RELOCS (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_text (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_fini (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_rodata1 (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_fixup (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_gcc_except_table (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_eh_frame (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_got (mram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_data (ram, 0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE + 0x400, FOLLOWING (.got))
+ SECTION_sram (ram, ALIGN (0x8), LMA_EQ_VMA)
+ SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA)
+ CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+ SECTIONS_END
+}
+
+hal_vsr_table = (0x20000000 - CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE);
+hal_virtual_vector_table = hal_vsr_table + 128*4;
+hal_startup_stack = 0x20000000 + CYGHWR_HAL_KINETIS_SRAM_BANK_SIZE;
diff -Naur ecos-005373cca888-old/packages/hal/cortexm//kinetis/var/current/src/kinetis_clocking.c ecos-005373cca888/packages/hal/cortexm//kinetis/var/current/src/kinetis_clocking.c
--- ecos-005373cca888-old/packages/hal/cortexm//kinetis/var/current/src/kinetis_clocking.c 2011-10-30 21:39:51.000000000 +0100
+++ ecos-005373cca888/packages/hal/cortexm//kinetis/var/current/src/kinetis_clocking.c 2011-11-10 15:52:13.000000000 +0100
@@ -101,13 +101,23 @@
// Real Time Clock
hal_start_rtc_clock();
# endif
+
+#if !defined(CYG_HAL_STARTUP_MRAM)
// Main clock - MCG
hal_start_main_clock();
#endif
+#endif
+
+#if !defined(CYG_HAL_STARTUP_MRAM)
hal_kinetis_sysclk=hal_get_cpu_clock();
+#else
+ hal_kinetis_sysclk=CYGNUM_HAL_CORTEXM_KINETIS_MCGOUT_FREQ;
+#endif
+
hal_kinetis_busclk=hal_kinetis_sysclk /
CYGHWR_HAL_CORTEXM_KINETIS_CLKDIV_PER_BUS;
hal_cortexm_systick_clock=hal_kinetis_sysclk;
+
// Trace clock
#ifdef CYGHWR_HAL_CORTEXM_KINETIS_TRACECLK_CORE
sim_p->sopt2 |= CYGHWR_HAL_KINETIS_SIM_SOPT2_TRACECLKSEL_M;
--
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
[Linux Embedded]
[U-Boot V2]
[Linux Kernel]
[Linux MIPS]
[Linux ARM]
[Linux for the Blind]
[Linux Resources]
[Photo]
[Yosemite]
[ISDN Cause Codes]
[ECOS Home]
[Site Home]
