Re: [PATCH V8 3/9] phy: SPEAr1310/40-miphy: Add binding information

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On Tuesday 15 April 2014 05:13 PM, Mohit Kumar wrote:
> From: Pratyush Anand <pratyush.anand@xxxxxx>
> 
> SPEAr1310/40 uses miphy for PCIe, SATA. This patch adds documentation
> for the binding on the top of generic phy bindings.
> 
> Signed-off-by: Pratyush Anand <pratyush.anand@xxxxxx>
> Acked-by: Arnd Bergmann <arnd@xxxxxxxx>
> Cc: Mohit Kumar <mohit.kumar@xxxxxx>
> Cc: Viresh Kumar <viresh.linux@xxxxxxxxx>
> Cc: Kishon Vijay Abraham I <kishon@xxxxxx>
> Cc: spear-devel@xxxxxxxxxxx
> Cc: devicetree@xxxxxxxxxxxxxxx

Acked-by: Kishon Vijay Abraham I <kishon@xxxxxx>
> ---
>  .../devicetree/bindings/phy/st-spear1310-miphy.txt |   12 ++++++++++++
>  .../devicetree/bindings/phy/st-spear1340-miphy.txt |   11 +++++++++++
>  2 files changed, 23 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt
>  create mode 100644 Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt b/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt
> new file mode 100644
> index 0000000..b9b281a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt
> @@ -0,0 +1,12 @@
> +ST SPEAr1310-miphy DT detail
> +===================================
> +
> +SPEAr1310-miphy is a phy controller supporting PCIe and SATA.
> +
> +Required properties:
> +- compatible : should be "st,spear1310-miphy"
> +- reg : offset and length of the PHY register set.
> +- misc: phandle for the syscon node to access misc registers
> +- phy-id: Instance id of the phy.
> +- #phy-cells : from the generic PHY bindings, must be 1.
> +	- cell[1]: 0 if phy used for SATA, 1 for PCIe.
> diff --git a/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt b/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt
> new file mode 100644
> index 0000000..7eb5335
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt
> @@ -0,0 +1,11 @@
> +ST SPEAr1340-miphy DT detail
> +===================================
> +
> +SPEAr1340-miphy is a phy controller supporting PCIe and SATA.
> +
> +Required properties:
> +- compatible : should be "st,spear1340-miphy"
> +- reg : offset and length of the PHY register set.
> +- misc: phandle for the syscon node to access misc registers
> +- #phy-cells : from the generic PHY bindings, must be 1.
> +	- cell[1]: 0 if phy used for SATA, 1 for PCIe.
> 
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