Re: how atomic is the atomic set instruction?

[Bill Gatliff <bgat@xxxxxxxxxxxxxxx>]

Russell King - ARM Linux wrote:
> On Sat, Nov 08, 2008 at 03:59:50PM +0100, Ali Günhan Akyürek wrote:
>> atomic_set doesn´t say anything about interrupts. So i assume interrupts
>> are on, and context switch can occur. Between the load and store
>> instruction.
> 
> As I've told you before, just because something's called "atomic" doesn't
> make it atomic.  Your use is plan and simple buggy.

You guys aren't talking about the same "atomic".

The atomic_* operations manipulate the atomic_t data type in ways that
guarantee that the value cannot get munged even if a competing thread
attempts an update at the same time.

BUT, the sequence of instructions needed to implement the atomic_t
type do not necessarily have to be uninterruptible, and indeed on ARM
they are not.

Case in point: in the OP's example, the location of 'i' isn't changing
and so it doesn't matter how long it takes to calculate the address,
or whether an interruption occurs during that calculation or not.  All
that's important is that when you finally have the address and value
in question, you can commit the value to its destination (register or
memory) in a single transaction.

If you need a data type that can be updated lock-free, use an
atomic_t.  If you need a sequence of instructions that can't be
interrupted, use spin_lock_irqsave().  Two different tools for two
different purposes.


HTH,


b.g.
-- 
Bill Gatliff
bgat@xxxxxxxxxxxxxxx

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