TR: interfacing FPGA to AT91RM9200

["Patrick" <kpa_info@xxxxxxxx>]

I have made a driver that communicates with an FPGA. The FPGA are connected
on the AT91RM9200 memory bus. 

This is some extract from this driver:


int init_module(void) 
{
	int devno;
	int i=0;
	int tmp[4];
	int tmp2 = 0;
	struct cdev *romeo_cdev;
	
	//Initialise the driver structure and communication with userspace
	printk("Romeo: Registering FPGA driver...\n");
	devno = MKDEV(ROMEO_MAJOR, ROMEO_MINOR);
	printk("       devno : %d\n", devno);
	romeo_cdev = cdev_alloc();
	romeo_cdev->ops = &romeo_fops;
	if(cdev_add(romeo_cdev, devno, 1) < 0)
	{
	    printk("Romeo: Erreur cdev_add\n");
	    return -1;
	}


      //Configure SMC (Static Memory Controller)   
      at91_sys_write(AT91_SMC_CSR(3), 
                   AT91_SMC_RWHOLD_(1) | AT91_SMC_RWSETUP_(1) | 
                   AT91_SMC_ACSS_STD | AT91_SMC_DBW_16 | AT91_SMC_BAT | 
                   AT91_SMC_TDF_(1) | AT91_SMC_WSEN | AT91_SMC_NWS_(4)); 

	
	//Request IO region for the Xilinx FPGA and remmap it
	if(request_mem_region(XC2_BASE, XC2_SIZE, 
                            " Xilinx FPGA") == NULL)
	{
		printk("Region already used (XC2)\n");
		return -1;
	}
	xc2_addr = ioremap(XC2_BASE, XC2_SIZE); 
	printk("Xilinx remapped at 0x%X\n",(int)xc2_addr);	
}




And now test code for reading the FPGA:


	iowrite32(0x12345678,xc2_addr+0);
	tmp[0] = ioread32(xc2_addr+0);
	iowrite32(0x23456789,xc2_addr+4);
	tmp[1] = ioread32(xc2_addr+4);
	iowrite32(0x3456789A,xc2_addr+8);
	tmp[2] = ioread32(xc2_addr+8);
	iowrite32(0x456789AB,xc2_addr+12);
	tmp[3] = ioread32(xc2_addr+12);
	
	printk("Value: %d (0x%X)\n", tmp[0], tmp[0]);
	printk("Value: %d (0x%X)\n", tmp[1], tmp[1]);
	printk("Value: %d (0x%X)\n", tmp[2], tmp[2]);
	printk("Value: %d (0x%X)\n", tmp[3], tmp[3]);

This is not optimized. This is only for testing purpose.

Don't forget to clean after use:

void cleanup_module(void) 
{
      iounmap(xc2_addr);
	release_mem_region(XC2_BASE, XC2_SIZE);
}

Patrick

-----Message d'origine-----
De : linux-arm-bounces@xxxxxxxxxxxxxxxxxxxxxx
[mailto:linux-arm-bounces@xxxxxxxxxxxxxxxxxxxxxx] De la part de Russell King
- ARM Linux
Envoyé : vendredi, 5. septembre 2008 14:57
À : Manila Goel
Cc : linux-arm@xxxxxxxxxxxxxxxxxxxxxx
Objet : Re: interfacing FPGA to AT91RM9200

On Wed, Sep 03, 2008 at 11:37:08AM +0530, Manila Goel wrote:
> As u hv suggested i hv configured EBI and SMC as under:
> 
> int __iomem *addPtr;        // probably should be volatile!
> #define BASE_ADDRESS 0x50000000
> AT91_SYS->EBI_CSA &= 0xffffffef;
> AT91_SYS->EBI_CFGR &= 0xfffffffe;
> 
>
AT91_SYS->EBI_SMC2_CSR[4]=(AT91C_SMC2_NWS&0x01)|AT91C_SMC2_WSEN|AT91C_SMC2_B
AT|AT91C_SMC2_DBW_16;
> addPtr=(int __iomem*)ioremap(BASE_ADDRESS,4);
> writew(data,addPtr);

Umm, no.  Firstly, casts for the hell of it are bad.  Really, they are.
Don't use casts lightly.  If you have to put a cast in, THINK very
carefully.

Secondly, you're not checking the return value of ioremap.  Typical
embedded programmers. 8)

	void __iomem *ptr = ioremap(BASE_ADDRESS, 4);
	if (ptr)
		writew(data, ptr);

is all that you need.

(as for your problem, I can't help you with that.)

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