RE: ep93xx gpio interrupt debounce | |
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On Wednesday, April 23, 2008 6:25 PM, Lennert Buytenhek wrote: > > The patch below adds debouncing support to the ep93xx GPIO interrupts. > > > > Please review and let me know if it looks okay. > > Ah. This looks very similar to the patch I wrote for it originally. Well, it should. I just updated it for the new kernel ;-) > And I remember now why I never submitted it for merging: > > > Index: src/working/linux-2.6.25/include/asm-arm/irq.h > > =================================================================== > > --- src.orig/working/linux-2.6.25/include/asm-arm/irq.h 2008-04-22 > > 19:57:08.000000000 -0700 > > +++ src/working/linux-2.6.25/include/asm-arm/irq.h 2008-04-22 > > 19:58:03.000000000 -0700 > > @@ -35,6 +35,7 @@ > > #define IRQT_LOW (__IRQT_LOWLVL) > > #define IRQT_HIGH (__IRQT_HIGHLVL) > > #define IRQT_PROBE IRQ_TYPE_PROBE > > +#define IRQT_DEBOUNCE (1 << 5) > > > > #ifndef __ASSEMBLY__ > > struct irqaction; > > I'm not happy with this part -- it seems wrong to add a IRQT_* for > something that is only used on one particular SoC. > > Then again, the ->set_type() API _is_ IMHO the place where debounce > should be handled. > > So.. I don't know what to do with this, basically. I agree adding the new IRQT_* is dicey. But.. set_irq_type() doesn't do anything with the type parameter except pass it to desc->chip->set_type(). Which in turn calls the ep93xx machine specific function. The IRQT_DEBOUNCE flag is checked first, handled, then masked off the type parameter. So when desc->status gets set all the bits are "normal". What about renaming IRQT_DEBOUNCE to IRQT_EP93XX_DEBOUNCE and moving the definition to <asm/arch/irqs.h> (<asm-arm/arch-ep93xx/irqs.h> with a big fat warning with what it's used for? Hartley ------------------------------------------------------------------- List admin: http://lists.arm.linux.org.uk/mailman/listinfo/linux-arm FAQ: http://www.arm.linux.org.uk/mailinglists/faq.php Etiquette: http://www.arm.linux.org.uk/mailinglists/etiquette.php
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