Flash Burst Mode, where goes init to?

[Konstantin Kletschke <lists@xxxxxxxxx>]

Hi!

Jared, my last answer to you went to you personally, sorry it should go
to the list... (is there any MUA which automatically recognizes a list
and does a list reply in that case?).

The performance is indeed a bit worse, roughly by 10% to 15%.
I don't think there is an error in my burst mode config, I think it does
not burst. With the scope I see Burst arbitration on the chip but every
burst is cancelled after the first data word.

I thought something like that, that the Falsh device address' has to be
declared to be cacheable, but how do I do that?

I looked around a bit in arch/arm/mach-imx and include/asm-arm but did
not found a file declaring cacheable regions.

Where is that done in linuux kernel (suspecting the kernel does it,
since he switches on caches and MMU)?

Regards, konsti


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