multiple interrupts on single IRQ line

[Shakthi Kannan <shakstux@xxxxxxxxx>]

Greetings!

I would like to know as how we can/should handle
occurrence of multiple interrupts (interrupt strobing)
from an FPGA across an ARM EBI interface in an
interrupt handler. Using linux-2.4.19-rmk7 on an ARM9
(AT91RM9200) board with cross-toolchain 2.95.3.

The FPGA IP core (daughter board) connects to the ARM
board through the EBI interface and is mapped to a
single IRQ line (say IRQ 15). The FPGA core on the
daughter board runs in nano seconds, while the kernel
in the ARM board runs in milliseconds. 

When I am servicing an interrupt in the interrupt
handler, multiple interrupts get generated and since I
am servicing the handler, they are missed. I believe
only if the interrupt handler is called does
/proc/interrupts increment the corresponding count for
the interrupt.

To handle such timing, is it essential that the kernel
(and the driver) be able to disable/enable interrupts
on the FPGA to handle the synchronization, or are
there any other methods of handling this?

Thanks,

K Shakthi


		
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