[PATCH] ARM L2 Cache flush all implementation support

[melwyn lobo <linux.melwyn@xxxxxxxxx>]

Hello all,
This patch is added to provide  Flush all operation on l2 cache which
is required in cases of power management
where we just before we enter deep sleep we need to flush all l2 cache
lines to ensure coherency.This could also be use while
rebooting the system. Further to ley other platforms access it
generically a function pointer is added and populated in outer_cache
functions. It is based on Linux-2.6.31-rc1. Please do provide your
suggestions/advice.
Regards,
M.

 arch/arm/include/asm/cacheflush.h |    1 +
 arch/arm/mm/cache-l2x0.c          |    9 +++++++++
 2 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/cacheflush.h
b/arch/arm/include/asm/cacheflush.h
index 1a711ea..064056d 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -222,6 +222,7 @@ struct outer_cache_fns {
 	void (*inv_range)(unsigned long, unsigned long);
 	void (*clean_range)(unsigned long, unsigned long);
 	void (*flush_range)(unsigned long, unsigned long);
+	void (*flush_all)(void);
 };

 /*
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index b480f1d..69ba818 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -93,6 +93,14 @@ static void l2x0_flush_range(unsigned long start,
unsigned long end)
 	cache_sync();
 }

+inline void l2x0_flush_all(void)
+{
+	/* clean and invalidate all ways */
+	sync_writel(0xff, L2X0_CLEAN_INV_WAY, 0xff);
+	cache_sync();
+
+}
+
 void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
 {
 	__u32 aux;
@@ -115,6 +123,7 @@ void __init l2x0_init(void __iomem *base, __u32
aux_val, __u32 aux_mask)
 	outer_cache.inv_range = l2x0_inv_range;
 	outer_cache.clean_range = l2x0_clean_range;
 	outer_cache.flush_range = l2x0_flush_range;
+	outer_cache.flush_all = l2x0_flush_all;

 	printk(KERN_INFO "L2X0 cache controller enabled\n");
 }

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