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[PATCH v2] i.MX1/L: add support for FIQ

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Adds FIQ support for i.MX1/L

Drivers which are going to use it will have to select it and use
imx_set_irq_fiq() to set FIQ mode for this interrupt.

Changes since V1:
- removed '#ifdef CONFIG_FIQ' from irqs.h
- renamed imx_set_irq_type() to imx_set_irq_fiq()
- made irqt unsigned
- fixed irq number check

Signed-off-by: Paulius Zaleckas <paulius.zaleckas@xxxxxxxxxxxx>

Index: linux-2.6.26/include/asm-arm/arch-imx/irqs.h
===================================================================
--- linux-2.6.26.orig/include/asm-arm/arch-imx/irqs.h
+++ linux-2.6.26/include/asm-arm/arch-imx/irqs.h
@@ -111,6 +111,11 @@
 /* decode irq number to use with IMR(x), ISR(x) and friends */
 #define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5)
 
+/* all normal IRQs can be FIQs */
+#define FIQ_START	0
+/* switch betwean IRQ and FIQ */
+extern int imx_set_irq_fiq(unsigned int irq, unsigned int type);
+
 #define NR_IRQS (IRQ_GPIOD(32) + 1)
 #define IRQ_GPIO(x)
 #endif
Index: linux-2.6.26/arch/arm/mach-imx/irq.c
===================================================================
--- linux-2.6.26.orig/arch/arm/mach-imx/irq.c
+++ linux-2.6.26/arch/arm/mach-imx/irq.c
@@ -36,10 +36,7 @@
 /*
  *
  * We simply use the ENABLE DISABLE registers inside of the IMX
- * to turn on/off specific interrupts.  FIXME- We should
- * also add support for the accelerated interrupt controller
- * by putting offets to irq jump code in the appropriate
- * places.
+ * to turn on/off specific interrupts.
  *
  */
 
@@ -102,6 +99,28 @@ imx_unmask_irq(unsigned int irq)
 	__raw_writel(irq, IMX_AITC_INTENNUM);
 }
 
+#ifdef CONFIG_FIQ
+int imx_set_irq_fiq(unsigned int irq, unsigned int type)
+{
+	unsigned int irqt;
+
+	if (irq >= IMX_IRQS)
+		return -EINVAL;
+
+	if (irq < IMX_IRQS / 2) {
+		irqt = __raw_readl(IMX_AITC_INTTYPEL) & ~(1 << irq);
+		__raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEL);
+	} else {
+		irq -= IMX_IRQS / 2;
+		irqt = __raw_readl(IMX_AITC_INTTYPEH) & ~(1 << irq);
+		__raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEH);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL(imx_set_irq_fiq);
+#endif /* CONFIG_FIQ */
+
 static int
 imx_gpio_irq_type(unsigned int _irq, unsigned int type)
 {
@@ -287,4 +306,9 @@ imx_init_irq(void)
 
 	/* Release masking of interrupts according to priority */
 	__raw_writel(-1, IMX_AITC_NIMASK);
+
+#ifdef CONFIG_FIQ
+	/* Initialize FIQ */
+	init_FIQ();
+#endif
 }
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