Query: clk: Defining new struct clk_foo types

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Hi Mike,

I am doing SPEAr SoCs clock port with common clock framework.

Currently there are following type of clk_foo implementations present:
- clk_gate
- clk_divider
- clk_fixed_rate
- clk_mux

I have few more in my SoC:
clk with:
- gate + divider
- gate + fixed_rate
- gate + mux

How should i go ahead in my implementation for these?
Should i create SPEAr specific structures or enhance drivers/clk for this?


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