Re: [PATCH 3/4] ARM: perf: check that we have an event in the PMU IRQ handlers

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On Fri, Feb 24, 2012 at 01:34:32AM +0000, Ming Lei wrote:
> On Thu, Feb 23, 2012 at 11:58 PM, Will Deacon <will.deacon@xxxxxxx> wrote:
> > @@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
> >                struct perf_event *event = cpuc->events[idx];
> >                struct hw_perf_event *hwc;
> >
> > -               if (!counter_is_active(pmcr, idx))
> > +               /* Ignore if we don't have an event. */
> > +               if (!event)
> I think we should check it via test_bit(idx, cpuc->used_mask) because
> 'hw_events->events[idx] = val' is not atomic operation and it is read here
> in irq context.

I dunno, that code is compiled to:

e5973000        ldr     r3, [r7]
e7834106        str     r4, [r3, r6, lsl #2]

so you should either see the new value or the old one - you can't see half a
pointer in there since it's a single 32-bit store.


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