Re: Opteron Vs. Athlon X2

["Bryan J. Smith" <b.j.smith@xxxxxxxx>]

On Sat, 2005-12-10 at 17:59 -0500, Mark Hahn wrote:
> "only"?  PIO went out 10+ years ago.

PIO was still in widespread use for until the last 5 years.  Heck, a
number of ATAPI devices still use it.

Only ATA's DMA modes are not PIO.  ESDI, IDE and EIDE are PIO.

> <shrug> you can abuse colloquial usage this way if you want, but you're 
> speaking your own language.  when the CPU computes XOR on a block,
> it's not called PIO, since, at the very least, it's not IO.  I suppose
> you'd also call memcpy a PIO operation.

Depends.  Understand that I'm not abusing any terminology.

> sure, but so what?  the interconnect is not the bottleneck.

Depends on how much the delay is before it gets to the bottleneck.  ;->

> it's a block memory operation, no different from memset or memcpy.  and,
> (HERE'S THE POINT), it's as fast, namely saturating memory at ~6 GB/s.

Ahhh, no.  You really need to do some research on how microprocessors
work, and what is involved when it comes to pushing something from DRAM
into cache and up through the instruction cycle, including the all-
important LOAD and STOR operations, or maybe the latencies involved in a
SIMD operation.

> OK, you have your own language.

That's why I use the term "consider" -- because it's very equivalent.

> don't be a jerk.  if you don't think a basic OTC opteron can xor 
> a block at around 6 GB/s, prove me wrong.

I'm not a jerk, I'm someone who doesn't have a GHz/GBps whore view of a
microprocessor.  I know I can't push 6.4GBps through the Opteron.

There is a reason we use ASIC hardware instead of host software to do
MAC layer filtering in Ethernet hardware.  Exact same concept when it
comes to storage switching too.

Now at this point, there is no sense in bothering to even attempt to
explain this further.  Sometimes I really hate that I have experience in
semiconductor design, because my views get repeatedly dismissed by IT
professionals.

E.g., another common one is the the folly of writing optimized code in
assembler on modern, superscalar microprocessors.

You will _not_ push 6.4GBps through the Opteron -- not even at doing a
simple XOR operation.  However, you _can_ get 1+GBps out of a common
storage IOP, or specialized HBA for TCP/IP because of the way ASIC
peripherals are designed on such specialized microcontrollers.

End of thread.
You can now assume I'm full of crap, I really don't care.


-- 
Bryan J. Smith   mailto:b.j.smith@xxxxxxxx
http://thebs413.blogspot.com
------------------------------------------
Some things (or athletes) money can't buy.
For everything else there's "ManningCard."


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