Re: ARM Primary FESCO discussion results, round 1
|[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]|
On 03/20/12 20:00, Brendan Conoboy wrote:
On 03/20/2012 02:48 AM, Gordan Bobic wrote:Are alignment problems not considered bugs? It's not just that this will break code on ARM< v7 and IIRC SPARC, but alignment issues also cause cache line straddling which has a performance impact.I took this question to be a case of knowing-just-enough-about-ARM-to-be-harmful. It's really a non-issue, particularly since later ARM chips don't have the problem.
Well...It is a real (but usually small) performance issue on on some ARMv7 processors for the basic LDR/STR/LDRH/STRH instructions.
However, LDM/STM/LDRD/STRD still need to be word aligned. So you're still looking at the choice between an application crashing or a risk of a two-orders-of-magnitude slowdown of some accesses due to kernel fixup in the exception handler unless the code is fixed.
/ Leif _______________________________________________ arm mailing list arm@xxxxxxxxxxxxxxxxxxxxxxx https://admin.fedoraproject.org/mailman/listinfo/arm